`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 			Arizona State University
// Engineer: 			Joe Boeding
// 						Taylor Wood
//
// Create Date:    	14:44:55 04/01/2013 
// Design Name: 		button_pulse_generator
// Module Name:    	button_pulse_generator 
// Project Name: 		LAB #2
// Target Devices: 	Xilinx Spartan6 XC6LX16-CS324
// Tool versions: 	Xilinx ISE 14.2
// Description: 		
//		This is just a wrapper for the button_handler module to conform with the
//		block diagram convention
//
// Dependencies: 		button_handler.v
//
// Revision: 		
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module button_pulse_generator # (
	/* Params  */  parameter SIGHYS_OFF = 60000, SIGHYS_ON = 35000)(
	/* Inputs  */ 	input i_button, i_clk, i_resetb,
	/* Outputs */	output o_positive_edge
    );

	// Button handler with hysteresis module used to ensure button noise
	// does not cause false readings
	button_handler # (
			.SIGHYS_OFF(SIGHYS_OFF),
			.SIGHYS_ON(SIGHYS_ON)
			) hndled_button (
			.switch(i_button),
			.clk(i_clk),
			.reset_b(i_resetb),
			.positive_edge(o_positive_edge)
    );	
	 
endmodule